diff -ruN u-boot-1.1.4/Makefile u-boot-1.1.4-e3/Makefile --- u-boot-1.1.4/Makefile 2005-12-16 16:39:27.000000000 +0000 +++ u-boot-1.1.4-e3/Makefile 2006-05-19 22:33:34.784030000 +0100 @@ -130,9 +130,9 @@ # The "tools" are needed early, so put this first # Don't include stuff already done in $(LIBS) SUBDIRS = tools \ - examples \ post \ post/cpu +# examples \ .PHONY : $(SUBDIRS) ######################################################################### @@ -1465,6 +1465,9 @@ omap5912osk_config : unconfig @./mkconfig $(@:_config=) arm arm926ejs omap5912osk +amsdelta_config : unconfig + @./mkconfig $(@:_config=) arm arm925t amsdelta + omap1610inn_config \ omap1610inn_cs0boot_config \ omap1610inn_cs3boot_config \ diff -ruN u-boot-1.1.4/board/amsdelta/Makefile u-boot-1.1.4-e3/board/amsdelta/Makefile --- u-boot-1.1.4/board/amsdelta/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ u-boot-1.1.4-e3/board/amsdelta/Makefile 2006-05-19 16:57:56.255113750 +0100 @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := amsdelta.o + +$(LIB): $(OBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -ruN u-boot-1.1.4/board/amsdelta/amsdelta.c u-boot-1.1.4-e3/board/amsdelta/amsdelta.c --- u-boot-1.1.4/board/amsdelta/amsdelta.c 1970-01-01 01:00:00.000000000 +0100 +++ u-boot-1.1.4-e3/board/amsdelta/amsdelta.c 2006-05-16 16:02:27.963318750 +0100 @@ -0,0 +1,188 @@ +/* + * Based on board/omap5912osk/omap5912osk.c + * + * Copyright (C) 2006 Mark Underwood + * Copyright (C) 2006 Jonathan McDowell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#if defined(CONFIG_OMAP1610) +#include <./configs/omap1510.h> +#endif + +void set_muxconf_regs (void); +void peripheral_power_enable (void); + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#include +extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; +#endif + +static u16 ams_delta_latch2_val = 0; + +#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) + +static inline void delay (unsigned long loops) +{ + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b":"=r" (loops):"0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* + * MACH_AMS_DELTA is 862 for a 2.6 kernel. + */ + gd->bd->bi_arch_number = 862; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x10000100; + + /* Configure MUX settings */ + set_muxconf_regs (); + peripheral_power_enable (); + +/* this speeds up your boot a quite a bit. However to make it + * work, you need make sure your kernel startup flush bug is fixed. + * ... rkw ... + */ + + icache_enable (); + + return 0; +} + +/* For now we have no flash! */ +unsigned long flash_init (void) +{ + return 0; +} + +/* PBL as done all the lowlevel init */ +void lowlevel_init (void) +{ + /* Light the email LED */ + *(volatile u8 *) 0x01000000 = 4; +} + +/****************************** + Routine: + Description: +******************************/ +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +/****************************************************** + Routine: set_muxconf_regs + Description: Setting up the configuration Mux registers + specific to the hardware +*******************************************************/ +void set_muxconf_regs (void) +{ + /* for basic boot up to serial port PBL as + * done all the HW init we need. + */ +} + +/****************************************************** + Routine: peripheral_power_enable + Description: Enable the power for UART1 +*******************************************************/ +void peripheral_power_enable (void) +{ +//#define UART1_48MHZ_ENABLE ((unsigned short)0x0200) +//#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834) +// +// *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE; +} + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +void ams_delta_latch2_write(u16 mask, u16 value) +{ + ams_delta_latch2_val &= ~mask; + ams_delta_latch2_val |= value; + *(volatile u16 *) 0x08000000 = ams_delta_latch2_val; +} + +void nand_init(void) +{ + ams_delta_latch2_write(~0, 0); + + nand_probe(CFG_NAND_ADDR); + if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { + print_size(nand_dev_desc[0].totlen, "\n"); + } else { + printf(" Not found.\n"); + } +} + +u8 ams_delta_nand_read(void) +{ + u8 val; + + ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); + udelay(1); + *(volatile u8 *) MPUIO_DIR_CONTROL_REG = ~0; + val = *(volatile u8 *) MPUIO_DATA_INPUT_REG; + ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, + AMS_DELTA_LATCH2_NAND_NRE); + + return val; +} + +void ams_delta_nand_write(u8 val) +{ + ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); + udelay(1); + *(volatile u8 *) MPUIO_DIR_CONTROL_REG = 0; + *(volatile u8 *) MPUIO_DATA_OUTPUT_REG = val; + ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, + AMS_DELTA_LATCH2_NAND_NWE); +} + +void ams_delta_nand_wait_ready(void) +{ + u32 i; + + /* + * Set direction for GPIO NAND ready bit. + */ + gpiosetdir(AMS_DELTA_NAND_RB, AMS_DELTA_NAND_RB); + + i = *(volatile u32 *) GPIO_DATA_INPUT_REG; + while ((i & AMS_DELTA_NAND_RB) != AMS_DELTA_NAND_RB) { + i = *(volatile u32 *) GPIO_DATA_INPUT_REG; + } +} + +#endif /* CFG_CMD_NAND */ diff -ruN u-boot-1.1.4/board/amsdelta/config.mk u-boot-1.1.4-e3/board/amsdelta/config.mk --- u-boot-1.1.4/board/amsdelta/config.mk 1970-01-01 01:00:00.000000000 +0100 +++ u-boot-1.1.4-e3/board/amsdelta/config.mk 2006-03-25 10:50:52.082928000 +0000 @@ -0,0 +1,19 @@ +# +# Amstrad E3 (Delta) Videophone +# +# http://www.amstrad.com/products/emailers/e3.html +# http://www.earth.li/~noodles/hardware-e3.html +# +# 1 bank of 32MB SDRAM +# Physical Address: +# 1000'0000 to 2000'0000 +# +# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000 +# (mem base + reserved) +# +# we load ourself to 11f00000 +# +# + +TEXT_BASE = 0x11f00000 +#TEXT_BASE = 0x10002084 diff -ruN u-boot-1.1.4/board/amsdelta/u-boot.lds u-boot-1.1.4-e3/board/amsdelta/u-boot.lds --- u-boot-1.1.4/board/amsdelta/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 +++ u-boot-1.1.4-e3/board/amsdelta/u-boot.lds 2006-03-19 11:59:54.847328750 +0000 @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm925t/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -ruN u-boot-1.1.4/fs/cramfs/cramfs.c u-boot-1.1.4-e3/fs/cramfs/cramfs.c --- u-boot-1.1.4/fs/cramfs/cramfs.c 2005-12-16 16:39:27.000000000 +0000 +++ u-boot-1.1.4-e3/fs/cramfs/cramfs.c 2006-03-05 22:54:09.152598000 +0000 @@ -29,6 +29,8 @@ #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) +#ifndef CFG_NO_FLASH + #include #include #include @@ -344,4 +346,30 @@ return 1; } +#else /* CFG_NO_FLASH */ + +int cramfs_check(struct part_info *info) +{ + return 0; +} + + +int cramfs_info (struct part_info *info) +{ + return 0; +} + + +int cramfs_load (char *loadoffset, struct part_info *info, char *filename) +{ + return -1; +} + +int cramfs_ls (struct part_info *info, char *filename) +{ + return -1; +} + +#endif /* CFG_NO_FLASH */ + #endif /* CFG_FS_CRAMFS */ diff -ruN u-boot-1.1.4/include/configs/amsdelta.h u-boot-1.1.4-e3/include/configs/amsdelta.h --- u-boot-1.1.4/include/configs/amsdelta.h 1970-01-01 01:00:00.000000000 +0100 +++ u-boot-1.1.4-e3/include/configs/amsdelta.h 2006-05-19 16:58:30.345244250 +0100 @@ -0,0 +1,222 @@ +/* + * (C) Copyright 2003 + * Texas Instruments. + * Kshitij Gupta + * Configuation settings for the TI OMAP Innovator board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM925T 1 /* This is an arm925t CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP1510 1 /* 5910 is sort of a 1510 */ +#define CONFIG_AMSDELTA 1 /* An Amstrad Delta (E3) */ + +/* input clock of PLL */ +/* the not sure what the E3 sys clock is. Do we need to know? */ +#define CONFIG_SYS_CLK_FREQ 12000000 + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * NS16550 Configuration + */ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE (-4) +#define CFG_NS16550_CLK 12000000 /* can be 12M/32Khz or 48Mhz */ +#define CFG_NS16550_COM1 0xfffb0000 /* UART1, the EXP port */ + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +//((CONFIG_CMD_DFL & (~CFG_CMD_IMLS))UL) /* Default config - IMLS*/ + +#define CONFIG_COMMANDS (CFG_CMD_ASKENV | CFG_CMD_LOADB | \ + CFG_CMD_BDI | CFG_CMD_DIAG | \ + CFG_CMD_LOADS | CFG_CMD_MEMORY | \ + CFG_CMD_MISC | CFG_CMD_RUN | \ + CFG_CMD_NAND | CFG_CMD_JFFS2 ) + +#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT + +#define CFG_HUSH_PARSER 1 +#define CFG_PROMPT_HUSH_PS2 "> " + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include +#include + +#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,115200n8 root=/dev/mtdblock4 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nboot 11d00000 0 ; bootm 11d00000" + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 9600 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "E3 # " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x10000000 /* memtest works on */ +#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x10000000 /* default load address */ + +/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by + * DPLL1. This time is further subdivided by a local divisor. + */ +#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */ +#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT)) + + +#define CFG_ENV_IS_NOWHERE + + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ + +//#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ + +#define CFG_NO_FLASH +//#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +//#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +//#define PHYS_FLASH_SIZE 0x00010000 /* 64k */ +//#define CFG_MAX_FLASH_SECT (2048) /* max number of sectors on one chip */ +/* addr of environment */ +//#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000) + +/* timeout values are in ticks */ +//#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ +//#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ + +//#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ +//#define CFG_ENV_OFFSET 0x20000 /* environment starts here */ + +/* + * 32M NAND config + */ +#ifndef __ASSEMBLY__ +#include +extern void ams_delta_latch2_write(u16 mask, u16 value); +extern u8 ams_delta_nand_read(void); +extern void ams_delta_nand_write(u8 val); +extern void ams_delta_nand_wait_ready(void); +#endif /* __ASSEMBLY__ */ + +#define AMS_DELTA_LATCH2_NAND_NCE 0x0004 +#define AMS_DELTA_LATCH2_NAND_NRE 0x0008 +#define AMS_DELTA_LATCH2_NAND_NWP 0x0010 +#define AMS_DELTA_LATCH2_NAND_NWE 0x0020 +#define AMS_DELTA_LATCH2_NAND_ALE 0x0040 +#define AMS_DELTA_LATCH2_NAND_CLE 0x0080 +#define AMS_DELTA_NAND_RB (1 << 12) + +#define NAND_DEBUG 1 + +#define SECTORSIZE 512 +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 +#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_MAX_FLOORS 1 +#define NAND_MAX_CHIPS 1 + +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_ADDR 0x08000000 + +#define NAND_NO_RB 1 + +#define NAND_WAIT_READY(nand) ams_delta_nand_wait_ready() + +#define WRITE_NAND_COMMAND(d, adr) ams_delta_nand_write(d) +#define WRITE_NAND_ADDRESS(d, adr) ams_delta_nand_write(d) +#define WRITE_NAND(d, adr) ams_delta_nand_write(d) + +#define READ_NAND(adr) ams_delta_nand_read() +#define NAND_DISABLE_CE(nand) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NCE, AMS_DELTA_LATCH2_NAND_NCE); } while (0) +#define NAND_ENABLE_CE(nand) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NCE, 0); } while (0) +#define NAND_CTL_CLRALE(nandptr) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_ALE, 0); } while (0) +#define NAND_CTL_SETALE(nandptr) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_ALE, AMS_DELTA_LATCH2_NAND_ALE); } while (0) +#define NAND_CTL_CLRCLE(nandptr) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_CLE, 0); } while (0) +#define NAND_CTL_SETCLE(nandptr) do { ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_CLE, AMS_DELTA_LATCH2_NAND_CLE); } while (0) + +#define CONFIG_JFFS2_DEV "nand0" +#define CONFIG_JFFS2_NAND 1 +#define CONFIG_JFFS2_NAND_DEV 0 +#define CONFIG_JFFS2_PART_OFFSET 0x00440000 /* 4.25M into flash */ +#define CONFIG_JFFS2_PART_SIZE 27*1024*1024 + +#endif /* __CONFIG_H */ diff -ruN u-boot-1.1.4/lib_arm/board.c u-boot-1.1.4-e3/lib_arm/board.c --- u-boot-1.1.4/lib_arm/board.c 2005-12-16 16:39:27.000000000 +0000 +++ u-boot-1.1.4-e3/lib_arm/board.c 2006-04-26 11:24:51.660141750 +0100 @@ -266,7 +266,7 @@ mem_malloc_init (_armboot_start - CFG_MALLOC_LEN); #if (CONFIG_COMMANDS & CFG_CMD_NAND) - puts ("NAND:"); + puts ("NAND: "); nand_init(); /* go init the NAND */ #endif